21 search results - page 3 / 5 » Exploring Fault-Tolerant Network-on-Chip Architectures |
PDP
2011
IEEE
12 years 11 months ago
2011
IEEE
Abstract—Continuously reducing transistor sizes and aggressive low power operating modes employed by modern architectures tend to increase transient error rates. Concurrently, mu...
SRDS
1998
IEEE
13 years 12 months ago
1998
IEEE
The primary-backup replication model is one of the commonly adopted approaches to providing fault tolerant data services. Its extension to the real-time environment, however, impo...
ISCA
2011
IEEE
12 years 11 months ago
2011
IEEE
With technology scaling, manufacture-time and in-field permanent faults are becoming a fundamental problem. Multi-core architectures with spares can tolerate them by detecting an...
ASAP
2005
IEEE
14 years 1 months ago
2005
IEEE
In this paper we introduce a design methodology that allows the system/circuit designer to build reliable systems out of unreliable nano-scale components. The central point of our...
ISQED
2002
IEEE
14 years 18 days ago
2002
IEEE
Critical systems like pace-makers, defibrillators, wearable computers and other electronic gadgets have to be designed not only for reliability but also for ultra-low power consu...