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HPCA
2006
IEEE
14 years 7 months ago
Completely verifying memory consistency of test program executions
An important means of validating the design of commercial-grade shared memory multiprocessors is to run a large number of pseudo-random test programs on them. However, when intent...
Chaiyasit Manovit, Sudheendra Hangal
DAC
2003
ACM
14 years 7 months ago
Optimizations for a simulator construction system supporting reusable components
Exploring a large portion of the microprocessor design space requires the rapid development of efficient simulators. While some systems support rapid model development through the...
David A. Penry, David I. August
CIDM
2011
IEEE
12 years 10 months ago
A GPU-based interactive bio-inspired visual clustering
Abstract—In this work, we present an interactive visual clustering approach for the exploration and analysis of vast volumes of data. The proposed approach is based on a bio-insp...
Ugo Erra, Bernardino Frola, Vittorio Scarano
CONEXT
2007
ACM
13 years 10 months ago
On the cost of caching locator/ID mappings
Very recent activities in the IETF and in the Routing Research Group (RRG) of the IRTG focus on defining a new Internet architecture, in order to solve scalability issues related ...
Luigi Iannone, Olivier Bonaventure
CC
2010
Springer
190views System Software» more  CC 2010»
14 years 1 months ago
Is Reuse Distance Applicable to Data Locality Analysis on Chip Multiprocessors?
On Chip Multiprocessors (CMP), it is common that multiple cores share certain levels of cache. The sharing increases the contention in cache and memory-to-chip bandwidth, further h...
Yunlian Jiang, Eddy Z. Zhang, Kai Tian, Xipeng She...