59 search results - page 11 / 12 » Exploring Memory Hierarchy with ArchC |
ERSA
2004
13 years 8 months ago
2004
Modern reconfigurable computing systems feature powerful hybrid architectures with multiple microprocessor cores, large reconfigurable logic arrays and distributed memory hierarch...
CL
2004
Springer
13 years 7 months ago
2004
Springer
In the context of meta-programming and reflective languages, classes are treated as full fledged objects which are instances of other classes named metaclasses. Metaclasses have p...
CGO
2007
IEEE
14 years 1 months ago
2007
IEEE
Emerging microprocessors offer unprecedented parallel computing capabilities and deeper memory hierarchies, increasing the importance of loop transformations in optimizing compile...
VC
2008
13 years 7 months ago
2008
We present an adaptive out-of-core technique for rendering massive scalar volumes employing single pass GPU raycasting. The method is based on the decomposition of a volumetric dat...
GLVLSI
2005
IEEE
14 years 1 months ago
2005
IEEE
The instruction cache is a popular target for optimizations of microprocessor-based systems because of the cache’s high impact on system performance and power, and because of th...