Sciweavers

59 search results - page 8 / 12
» Exploring Memory Hierarchy with ArchC
Sort
View
PATMOS
2000
Springer
13 years 11 months ago
Data-Reuse and Parallel Embedded Architectures for Low-Power, Real-Time Multimedia Applications
Exploitation of data re-use in combination with the use of custom memory hierarchy that exploits the temporal locality of data accesses may introduce significant power savings, esp...
Dimitrios Soudris, Nikolaos D. Zervas, Antonios Ar...
EUROPAR
2008
Springer
13 years 9 months ago
Low-Cost Adaptive Data Prefetching
We explore different prefetch distance-degree combinations and very simple, low-cost adaptive policies on a superscalar core with a high bandwidth, high capacity on-chip memory hie...
Luis M. Ramos, José Luis Briz, Pablo E. Ib&...
ASPLOS
2006
ACM
13 years 9 months ago
Tradeoffs in fine-grained heap memory protection
Different uses of memory protection schemes have different needs in terms of granularity. For example, heap security can benefit from chunk separation (by using protected "pa...
Jianli Shen, Guru Venkataramani, Milos Prvulovic
IPPS
2010
IEEE
13 years 5 months ago
Solving the advection PDE on the cell broadband engine
In this paper we present the venture of porting two different algorithms for solving the two-dimensional advection PDE on the CBE platform, an in-place and an outof-place one, and ...
Georgios Rokos, Gerassimos Peteinatos, Georgia Kou...
CEC
2010
IEEE
13 years 7 months ago
Parallel hybrid evolutionary algorithms on GPU
Abstract— Over the last years, interest in hybrid metaheuristics has risen considerably in the field of optimization. Combinations of methods such as evolutionary algorithms and...
Thé Van Luong, Nouredine Melab, El-Ghazali ...