1136 search results - page 47 / 228 » Exploring the multiple-GPU design space |
ASPDAC
2008
ACM
14 years 4 days ago
2008
ACM
Horizontally Partitioned Caches (HPCs) are a promising architectural feature to reduce the energy consumption of the memory subsystem. However, the energy reduction obtained using...
EDBT
2010
ACM
14 years 5 months ago
2010
ACM
In line with the insight that “one size” of databases will not fit all application needs [19], the database community is currently exploring various alternatives to commodity...
IEEECIT
2010
IEEE
13 years 7 months ago
2010
IEEE
Future systems will have to support multiple and concurrent dynamic compute-intensive applications, while respecting real-time and energy consumption constraints. With the increase...
SAC
2004
ACM
14 years 3 months ago
2004
ACM
Clustered L0 buffers are an interesting alternative to reduce energy consumption in the instruction memory hierarchy of embedded VLIW processors. Currently, the synthesis of L0 cl...
CODES
2004
IEEE
14 years 1 months ago
2004
IEEE
As a result of improvements in process technology, more and more components are being integrated into a single System-on-Chip (SoC) design. Communication between these components ...