73 search results - page 7 / 15 » Extending CRC cards into a complete design process |
ICCAD
2007
IEEE
2007
IEEE
Optimal polynomial-time interprocedural register allocation for high-level synthesis and ASIP design
14 years 4 months ago
—Register allocation, in high-level synthesis and ASIP design, is the process of determining the number of registers to include in the resulting circuit or processor. The goal is...
SOPR
2002
13 years 7 months ago
2002
Good project scheduling is an essential, but extremely hard task in software management practice. In a software project, the time needed to complete some development activity is d...
ICRA
2000
IEEE
14 years 2 days ago
2000
IEEE
We present an approach for automatically generating complete process plans, including xturing and CNC code, from high level shape feature part descriptions. The demonstration syst...
CGA
2005
13 years 7 months ago
2005
visualization to abstract data sets like network intrusion detection, recommender systems, and database query results. Although display algorithms are a critical component in the v...
ICDE
2006
IEEE
14 years 9 months ago
2006
IEEE
XML schema design has two opposing goals: elimination of update anomalies requires that the schema be as normalized as possible; yet higher query performance and simpler query exp...