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» Extending Platform-Based Design to Network on Chip Systems
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ET
2002
115views more  ET 2002»
13 years 7 months ago
CAS-BUS: A Test Access Mechanism and a Toolbox Environment for Core-Based System Chip Testing
As System on a Chip (SoC) testing faces new challenges, some new test architectures must be developed. This paper describes a Test Access Mechanism (TAM) named CASBUS that solves ...
Mounir Benabdenbi, Walid Maroufi, Meryem Marzouki
IWSOC
2005
IEEE
121views Hardware» more  IWSOC 2005»
14 years 1 months ago
Open HW, Open Design SW, and the VC Ecosystem Dilemma
The open model for solutions development is quickly extending from software to other technology areas, such as hardware and services. Specifically, just as open source has spawned...
Juan Antonio Carballo
DAC
2010
ACM
13 years 11 months ago
Networks on Chips: from research to products
Research on Networks on Chips (NoCs) has spanned over a decade and its results are now visible in some products. Thus the seminal idea of using networking technology to address th...
Giovanni De Micheli, Ciprian Seiculescu, Srinivasa...
AHS
2006
IEEE
124views Hardware» more  AHS 2006»
14 years 1 months ago
A Generic On-Chip Debugger for Wireless Sensor Networks
— This invited paper overviews the low level debug support hardware required for an on-chip predeployment debugging system for sensor networks. The solution provides significant...
Andrew B. T. Hopkins, Klaus D. McDonald-Maier
SIPS
2007
IEEE
14 years 2 months ago
Dynamic Channel Flow Control of Networks-on-Chip Systems for High Buffer Efficiency
System-on-Chip (SoC) designs become more complex nowadays. The communication between each processing element often suffers challenges due to the wiring problem. Networks-on-Chip (...
Sung-Tze Wu, Chih-Hao Chao, I-Chyn Wey, An-Yeu Wu