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» Extending Platform-Based Design to Network on Chip Systems
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WOTUG
2007
13 years 9 months ago
Integrating and Extending JCSP
This paper presents the extended and re-integrated JCSP library of CSP packages for Java. It integrates the differing advances made by Quickstone’s JCSP Network Edition and the ...
Peter H. Welch, Neil Brown, James Moores, Kevin Ch...
FAC
2008
97views more  FAC 2008»
13 years 7 months ago
A functional formalization of on chip communications
This paper presents a formal model and a systematic approach to the validation of communication tures at a high level of abstraction. This model is described mathematically by a fu...
Julien Schmaltz, Dominique Borrione
ISCA
2010
IEEE
214views Hardware» more  ISCA 2010»
14 years 25 days ago
Re-architecting DRAM memory systems with monolithically integrated silicon photonics
The performance of future manycore processors will only scale with the number of integrated cores if there is a corresponding increase in memory bandwidth. Projected scaling of el...
Scott Beamer, Chen Sun, Yong-Jin Kwon, Ajay Joshi,...
RTAS
1997
IEEE
13 years 12 months ago
Scalable Hardware Priority Queue Architectures for High-Speed Packet Switches
ÐWith effective packet-scheduling mechanisms, modern integrated networks can support the diverse quality-of-service requirements of emerging applications. However, arbitrating bet...
Sung-Whan Moon, Kang G. Shin, Jennifer Rexford
ISCAS
2005
IEEE
165views Hardware» more  ISCAS 2005»
14 years 1 months ago
An area-efficient and protected network interface for processing-in-memory systems
Abstract- This paper describes the implementation of an areaefficient and protected user memory-mapped network interface, the pbuf (Parcel Buffer), for the Data IntensiVe Architect...
Sumit D. Mediratta, Craig S. Steele, Jeff Sondeen,...