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» Extending Platform-Based Design to Network on Chip Systems
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SC
2009
ACM
14 years 2 months ago
Future scaling of processor-memory interfaces
Continuous evolution in process technology brings energyefficiency and reliability challenges, which are harder for memory system designs since chip multiprocessors demand high ba...
Jung Ho Ahn, Norman P. Jouppi, Christos Kozyrakis,...
DAC
2002
ACM
14 years 8 months ago
A physical model for the transient response of capacitively loaded distributed rlc interconnects
Rapid approximation of the transient response of high-speed global interconnects is needed to estimate the time delay, crosstalk, and overshoot in a GSI multilevel wiring network....
Raguraman Venkatesan, Jeffrey A. Davis, James D. M...
ISPD
2004
ACM
161views Hardware» more  ISPD 2004»
14 years 1 months ago
Early-stage power grid analysis for uncertain working modes
High performance integrated circuits are now reaching the 100-plus watt regime, and power delivery and power grid signal integrity have become critical. Analyzing the performance ...
Haifeng Qian, Sani R. Nassif, Sachin S. Sapatnekar
SCL
2010
114views more  SCL 2010»
13 years 2 months ago
Input-state incidence matrix of Boolean control networks and its applications
The input-state incidence matrix of control Boolean network is proposed. It is shown that this matrix contains complete information of the input-state mapping. Using it, an easily...
Yin Zhao, Hongsheng Qi, Daizhan Cheng
ISCA
2005
IEEE
134views Hardware» more  ISCA 2005»
14 years 1 months ago
A High Throughput String Matching Architecture for Intrusion Detection and Prevention
Network Intrusion Detection and Prevention Systems have emerged as one of the most effective ways of providing security to those connected to the network, and at the heart of alm...
Lin Tan, Timothy Sherwood