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CODES
2001
IEEE
13 years 11 months ago
RS-FDRA: a register sensitive software pipelining algorithm for embedded VLIW processors
The paper proposes a novel software-pipelining algorithm, Register Sensitive Force Directed Retiming Algorithm (RSFDRA), suitable for optimizing compilers targeting embedded VLIW ...
Cagdas Akturan, Margarida F. Jacome
MICRO
2000
IEEE
162views Hardware» more  MICRO 2000»
13 years 11 months ago
Accurate and efficient predicate analysis with binary decision diagrams
Functionality and performance of EPIC architectural features depend on extensive compiler support. Predication, one of these features, promises to reduce control flow overhead and...
John W. Sias, Wen-mei W. Hwu, David I. August
VLDB
1995
ACM
71views Database» more  VLDB 1995»
13 years 11 months ago
Database De-Centralization - A Practical Approach
We describe a scheme to fragment and distribute centralized databases. ’ The problem is motivated by trends towards down-sizing and reorganization, reflecting actual, often dist...
Tor Didriksen, César A. Galindo-Legaria, Ei...
LISP
2007
112views more  LISP 2007»
13 years 7 months ago
The next 700 Krivine machines
: The Krivine machine is a simple and natural implementation of the normal weak-head reduction strategy for pure λ-terms. While its original description has remained unpublished, ...
Rémi Douence, Pascal Fradet
LCTRTS
2007
Springer
14 years 1 months ago
Combining source-to-source transformations and processor instruction set extensions for the automated design-space exploration o
Industry’s demand for flexible embedded solutions providing high performance and short time-to-market has led to the development of configurable and extensible processors. The...
Richard Vincent Bennett, Alastair Colin Murray, Bj...