A logic is developed in which function symbols are allowed to represent partial functions. It has the usual rules of logic (in the form of a sequent calculus) except that the subs...
The SPIN model checker and its specification language Promela have been used extensively in industry and academia to check logical properties of distributed algorithms and protoc...
The Verilog hardware description language has padding semantics that allow designers to write descriptions where wires of different bit widths can be interconnected. However, many ...
Cherif Salama, Gregory Malecha, Walid Taha, Jim Gr...
We consider di usion processes on a class of R trees. The processes are de ned in a manner similar to that of Le Gall's Brownian snake. Each point in the tree has a real value...
rrent ML, synchronization abstractions can be defined and passed as values, much like functions in ML. This mechanism admits a powerful, modular style of concurrent programming, c...