Compact and high-speed hardware architectures and logic optimization methods for the AES algorithm Rijndael are described. Encryption and decryption data paths are combined and all...
In this paper we explore the relationship between adder topology and energy efficiency. We compare the energy-delay tradeoff curves of selected 32-bit adder topologies, to determi...
Dinesh Patil, Omid Azizi, Mark Horowitz, Ron Ho, R...
Although we do not profess to be capable of defining a `roadmap' for the foundations of SE over the next ten years, we can discern some important steps that would be extremel...
Stochastic simulations and other scientific applications that depend on random numbers are increasingly implemented in a parallelized manner in programmable logic. High-quality ps...
Ontology design is a complex and time-consuming process. It is extremely difficult for human experts to discover ontology from given data or texts. This paper presents a semi-autom...