1294 search results - page 137 / 259 » FFT Compiler Techniques |
136
Voted
ICS
1999
Tsinghua U.
15 years 8 months ago
1999
Tsinghua U.
Instruction scheduling is an important compiler technique for exploiting more instruction-level parallelism (ILP) in high-performance microprocessors, and in this paper, we study ...
125
Voted
ICS
1999
Tsinghua U.
15 years 8 months ago
1999
Tsinghua U.
As the gap between memory and processor speeds continues to widen, cache efficiency is an increasingly important component of processor performance. Compiler techniques have been...
135
Voted
CASES
2007
ACM
15 years 7 months ago
2007
ACM
In this paper we describe the design and implementation of a flexible, and extensible, just-in-time ARM simulator designed to run co-operatively with a multi-core DSP simulator on...
161
Voted
CASES
2007
ACM
15 years 7 months ago
2007
ACM
Dynamic binary translation (DBT) has been used to achieve numerous goals (e.g., better performance) for general-purpose computers. Recently, DBT has also attracted attention for e...
142
Voted
CSMR
2004
IEEE
15 years 7 months ago
2004
IEEE
Automatic analysis of programs with preprocessing directives and conditional compilation is challenging. The difficulties range from parsing to program understanding. Symbolic eva...