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ICS
1995
Tsinghua U.
14 years 6 days ago
Gated SSA-based Demand-Driven Symbolic Analysis for Parallelizing Compilers
In this paper, we present a GSA-based technique that performs more e cient and more precise symbolic analysis of predicated assignments, recurrences and index arrays. The e ciency...
Peng Tu, David A. Padua
MICRO
1995
IEEE
72views Hardware» more  MICRO 1995»
14 years 6 days ago
Dynamic rescheduling: a technique for object code compatibility in VLIW architectures
Lack of object code compatibility in VLIW architectures is a severe limit to their adoption as a generalpurpose computing paradigm. Previous approaches include hardware and softwa...
Thomas M. Conte, Sumedh W. Sathaye
IRREGULAR
1995
Springer
14 years 6 days ago
Run-Time Techniques for Parallelizing Sparse Matrix Problems
Sparse matrix problems are di cult to parallelize e ciently on message-passing machines, since they access data through multiple levels of indirection. Inspector executor strategie...
Manuel Ujaldon, Shamik D. Sharma, Joel H. Saltz, E...
RSP
1999
IEEE
122views Control Systems» more  RSP 1999»
14 years 28 days ago
Incremental Compilation for Logic Emulation
Over the past decade, the steady growth rate of FPGA device capacities has enabled the development of multi-FPGA prototyping environments capable of implementing millions of logic...
Russell Tessier
MICRO
1996
IEEE
142views Hardware» more  MICRO 1996»
14 years 25 days ago
Compiler Synthesized Dynamic Branch Prediction
Branch prediction is the predominant approach for minimizing the pipeline breaks caused by branch instructions. Traditionally, branch prediction is accomplished in one of two ways...
Scott A. Mahlke, Balas K. Natarajan