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» FPGA Technology Mapping for Power Minimization
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JUCS
2006
112views more  JUCS 2006»
13 years 7 months ago
A Multi-objective Genetic Approach to Mapping Problem on Network-on-Chip
Abstract: Advances in technology now make it possible to integrate hundreds of cores (e.g. general or special purpose processors, embedded memories, application specific components...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi
FPL
2004
Springer
103views Hardware» more  FPL 2004»
14 years 23 days ago
Automating Optimized Table-with-Polynomial Function Evaluation for FPGAs
Abstract. Function evaluation is at the core of many compute-intensive applications which perform well on reconfigurable platforms. Yet, in order to implement function evaluation ...
Dong-U Lee, Oskar Mencer, David J. Pearce, Wayne L...
APCCAS
2006
IEEE
271views Hardware» more  APCCAS 2006»
14 years 1 months ago
Leakage Optimized DECAP Design for FPGAs
— On-chip decoupling capacitors (Decaps) are widely used to mitigate on-chip power supply noise. At and below 100nm on-chip decaps face leakage and area overhead problems associa...
Balaji Vaidyanathan, Suresh Srinivasan, Yuan Xie, ...
TCAD
1998
126views more  TCAD 1998»
13 years 7 months ago
Iterative remapping for logic circuits
Abstract—This paper presents an aggressive optimization technique targeting combinational logic circuits. Starting from an initial implementation mapped on a given technology lib...
Luca Benini, Patrick Vuillod, Giovanni De Micheli
IMC
2010
ACM
13 years 5 months ago
A first look at traffic on smartphones
Using data from 43 users across two platforms, we present a detailed look at smartphone traffic. We find that browsing contributes over half of the traffic, while each of email, me...
Hossein Falaki, Dimitrios Lymberopoulos, Ratul Mah...