363 search results - page 23 / 73 » FPGA interconnect design using logical effort |
GLVLSI
2009
IEEE
14 years 2 months ago
2009
IEEE
In this paper, we propose novel architectural and design techniques for three-dimensional field-programmable gate arrays (3D FPGAs) with Through-Silicon Vias (TSVs). We develop a...
FPGA
2001
ACM
14 years 1 days ago
2001
ACM
Discrete wavelet transformations (DWT) followed by embedded zerotree encoding is a very efficient technique for image compression [2, 5, 4]. However, the algorithms proposed in l...
FCCM
2004
IEEE
13 years 11 months ago
2004
IEEE
Searching for multiple string patterns in a stream of data is a computationally expensive task. The speed of the search pattern module determines the overall performance of deep p...
FPL
2005
Springer
14 years 1 months ago
2005
Springer
Modern heterogeneous FPGAs contain “hard” specificpurpose structures such as blocks of memory and multipliers in addition to the completely flexible “soft” programmable ...
SLIP
2009
ACM
14 years 2 months ago
2009
ACM
The present paper is part of a larger effort to redesign, from the ground up, the best possible interconnect topologies for switchless multiprocessor computer systems. We focus he...