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» FPGA interconnect design using logical effort
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FCCM
2006
IEEE
162views VLSI» more  FCCM 2006»
14 years 2 months ago
Power Visualization, Analysis, and Optimization Tools for FPGAs
This paper introduces the Low-Power Intelligent Tool Environment (LITE), an object oriented tool set designed for power visualization, analysis, and optimization. These tools lever...
Matthew French, Li Wang, Michael J. Wirthlin
FPGA
2009
ACM
285views FPGA» more  FPGA 2009»
14 years 3 months ago
PERG-Rx: a hardware pattern-matching engine supporting limited regular expressions
PERG is a pattern matching engine designed for locating predefined byte string patterns (rules) from the ClamAV virus signature database in a data stream. This paper presents PERG...
Johnny Tsung Lin Ho, Guy G. Lemieux
FPGA
2004
ACM
126views FPGA» more  FPGA 2004»
14 years 2 months ago
A synthesis oriented omniscient manual editor
The cost functions used to evaluate logic synthesis transformations for FPGAs are far removed from the final speed and routability determined after placement, routing and timing a...
Tomasz S. Czajkowski, Jonathan Rose
ICCD
2005
IEEE
102views Hardware» more  ICCD 2005»
14 years 5 months ago
Monitoring Temperature in FPGA based SoCs
FPGA logic densities continue to increase at a tremendous rate. This has had the undesired consequence of increased power density, which manifests itself as higher ondie temperatu...
Sivakumar Velusamy, Wei Huang, John Lach, Mircea R...
ASAP
2008
IEEE
167views Hardware» more  ASAP 2008»
14 years 3 months ago
Extending the SIMPPL SoC architectural framework to support application-specific architectures on multi-FPGA platforms
Process technology has reduced in size such that it is possible to implement complete applicationspecific architectures as Systems-on-Chip (SoCs) using both Application-Specific I...
David Dickin, Lesley Shannon