In the design process of SoC (System on Chip), validation is one of the most critical and costly activity. The main problem for industrial companies like STMicroelectronics, stand...
Pierre Wodey, Geoffrey Camarroque, Fabrice Baray, ...
The creation and optimization of FPGA accelerators comprising several compute cores and memories are challenging tasks in high performance reconfigurable computing. In this paper...
Tobias Schumacher, Christian Plessl, Marco Platzne...
We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...
This paper reports on the design and implementation of FLORA -- a powerful DOOD system that incorporates the features of F-logic, HiLog, and Transaction Logic. FLORA is implemented...
In this work we address the problem of managing interconnect timing in high-level synthesis by generating a layoutfriendly microarchitecture. A metric called spreading score is pr...