363 search results - page 58 / 73 » FPGA interconnect design using logical effort |
JUCS
2006
13 years 7 months ago
2006
: The growth of sensor networks during the last years is a fact and within this field, wireless sensor networks are growing particularly as there are many applications that demand ...
MICRO
2009
IEEE
14 years 2 months ago
2009
IEEE
Modern DRAM systems rely on memory controllers that employ out-of-order scheduling to maximize row access locality and bank-level parallelism, which in turn maximizes DRAM bandwid...
ANCS
2006
ACM
14 years 1 months ago
2006
ACM
Clos networks are an important class of switching networks due to their modular structure and much lower cost compared with crossbars. For routing I/O permutations of Clos network...
LCTRTS
2009
Springer
14 years 2 months ago
2009
Springer
The fine-grained parallelism inherent in FPGAs has encouraged their use in packet processing systems. Debugging and performance evaluation of such complex designs can be signifi...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
—Nonvolatile logic-in-memory architecture, where nonvolatile memory elements are distributed over a logic-circuit plane, is expected to realize both ultra-low-power and reduced i...