363 search results - page 68 / 73 » FPGA interconnect design using logical effort |
DAC
2002
ACM
14 years 8 months ago
2002
ACM
Increasing non-recurring engineering (NRE) and mask costs are making it harder to turn to hardwired Application Specific Integrated Circuit (ASIC) solutions for high performance a...
CODES
2008
IEEE
14 years 2 months ago
2008
IEEE
The combination of flit-buffer flow control methods and latency-insensitive protocols is an effective solution for networks-on-chip (NoC). Since they both rely on backpressure...
ICPPW
2003
IEEE
14 years 23 days ago
2003
IEEE
Users have been demanding information “anytime, anywhere”. The notion of accessing diverse and autonomous information repositories with different APIs is not accepted. This ha...
CEE
2007
13 years 7 months ago
2007
It is a challenge to implement large word length public-key algorithms on embedded systems. Examples are smartcards, RF-ID tags and mobile terminals. This paper presents a HW/SW c...
EH
2000
IEEE
13 years 12 months ago
2000
IEEE
Evolvable Hardware (EHW) refers to HW design and selfreconfiguration using evolutionary/genetic mechanisms. The paper presents an overview of some key concepts of EHW, describing ...