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» FPGA technology mapping: a study of optimality
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FPGA
2007
ACM
150views FPGA» more  FPGA 2007»
14 years 1 months ago
FPGA-friendly code compression for horizontal microcoded custom IPs
Shrinking time-to-market and high demand for productivity has driven traditional hardware designers to use design methodologies that start from high-level languages. However, meet...
Bita Gorjiara, Daniel Gajski
ITCC
2003
IEEE
14 years 22 days ago
On Quaternary MacDonald Codes
This paper studies two families of codes over Z4, MacDonald codes of type α and type β. The torsion code, weight distribution, and Gray image properties are studied. Some intere...
Charles J. Colbourn, Manish K. Gupta
MICRO
2009
IEEE
124views Hardware» more  MICRO 2009»
14 years 2 months ago
ZerehCache: armoring cache architectures in high defect density technologies
Aggressive technology scaling to 45nm and below introduces serious reliability challenges to the design of microprocessors. Large SRAM structures used for caches are particularly ...
Amin Ansari, Shantanu Gupta, Shuguang Feng, Scott ...
SPATIALCOGNITION
2010
Springer
13 years 5 months ago
Verbally Annotated Tactile Maps - Challenges and Approaches
Survey knowledge of spatial environments can be successfully conveyed by visual maps. For visually impaired people, tactile maps have been proposed as a substitute. The latter are ...
Christian Graf
TPDS
2010
260views more  TPDS 2010»
13 years 5 months ago
Real-Time Modeling of Wheel-Rail Contact Laws with System-On-Chip
—This paper presents the development and implementation of a multiprocessor system-on-chip solution for fast and real time simulations of complex and nonlinear wheel-rail contact...
Yongji Zhou, T. X. Mei, Steven Freear