—This paper describes a low cost, low power, versatile computation module that can be used as a coarse-grain building block in multimedia processors. The module, which has a data...
This study reports on the performance of a Real-Time Vision System (RVS) and its use of an IMAP prototype LSI. This LSI integrates eight 8 bit processors and a 144 Kbit SRAM on a ...
This paper describes novel data-path architecture for FPGA-based multimedia processors. The proposed circuit can adapt itself at run-time to different operations and data wordleng...
Marco Lanuzza, Stefania Perri, Martin Margala, Pas...
In this paper an optimized k-means implementation on the graphics processing unit (GPU) is presented. NVIDIA’s Compute Unified Device Architecture (CUDA), available from the G8...
In this paper, we introduce a novel architecture for a hardware based network intrusion detection system (NIDS). NIDSs are becoming critical components of the network infrastructu...