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IEEEPACT
2007
IEEE
14 years 1 months ago
AA-Sort: A New Parallel Sorting Algorithm for Multi-Core SIMD Processors
Many sorting algorithms have been studied in the past, but there are only a few algorithms that can effectively exploit both SIMD instructions and threadlevel parallelism. In this...
Hiroshi Inoue, Takao Moriyama, Hideaki Komatsu, To...
ISLPED
2010
ACM
234views Hardware» more  ISLPED 2010»
13 years 5 months ago
Diet SODA: a power-efficient processor for digital cameras
Power has become the most critical design constraint for embedded handheld devices. This paper proposes a power-efficient SIMD architecture, referred to as Diet SODA, for DSP appl...
Sangwon Seo, Ronald G. Dreslinski, Mark Woh, Chait...
ISCAS
2006
IEEE
120views Hardware» more  ISCAS 2006»
14 years 1 months ago
Architecture of a VLSI cellular processor array for synchronous/asynchronous image processing
— This paper describes a new architecture for a cellular processor array integrated circuit, which operates in both discreteand continuous-time domains. Asynchronous propagation ...
Alexey Lopich, Piotr Dudek
HPCA
1998
IEEE
13 years 11 months ago
FPGA Based Custom Computing Machines for Irregular Problems
Over the past few years there has been increased interest in building custom computing machines (CCMs) as a way of achieving very high performance on specific problems. The advent...
David Abramson, Paul Logothetis, Adam Postula, Mar...
PPL
2008
63views more  PPL 2008»
13 years 7 months ago
Using Hardware Multithreading to Overcome Broadcast/Reduction Latency in an Associative SIMD Processor
The latency of broadcast/reduction operations has a significant impact on the performance of SIMD processors. This is especially true for associative programs, which make extensiv...
Kevin Schaffer, Robert A. Walker