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ASPLOS
2008
ACM
13 years 9 months ago
SoftSig: software-exposed hardware signatures for code analysis and optimization
Many code analysis techniques for optimization, debugging, or parallelization need to perform runtime disambiguation of sets of addresses. Such operations can be supported efficie...
James Tuck, Wonsun Ahn, Luis Ceze, Josep Torrellas
CODES
2005
IEEE
14 years 1 months ago
DVS for buffer-constrained architectures with predictable QoS-energy tradeoffs
We present a new scheme for dynamic voltage and frequency scaling (DVS) for processing multimedia streams on architectures with restricted buffer sizes. The main advantage of our ...
Alexander Maxiaguine, Samarjit Chakraborty, Lothar...
DAC
2009
ACM
14 years 8 months ago
Optimal static WCET-aware scratchpad allocation of program code
Caches are notorious for their unpredictability. It is difficult or even impossible to predict if a memory access will result in a definite cache hit or miss. This unpredictabilit...
Heiko Falk, Jan C. Kleinsorge
DAC
2006
ACM
14 years 1 months ago
Buffer memory optimization for video codec application modeled in Simulink
Reduction of the on-chip memory size is a key issue in video codec system design. Because video codec applications involve complex algorithms that are both data-intensive and cont...
Sang-Il Han, Xavier Guerin, Soo-Ik Chae, Ahmed Ami...
SIGMOD
2003
ACM
146views Database» more  SIGMOD 2003»
14 years 7 months ago
Estimating Compilation Time of a Query Optimizer
A query optimizer compares alternative plans in its search space to find the best plan for a given query. Depending on the search space and the enumeration algorithm, optimizers v...
Ihab F. Ilyas, Jun Rao, Guy M. Lohman, Dengfeng Ga...