Sciweavers

107 search results - page 9 / 22
» Facilitating worst-case execution times analysis for optimiz...
Sort
View
SIGMETRICS
2003
ACM
199views Hardware» more  SIGMETRICS 2003»
14 years 24 days ago
Data cache locking for higher program predictability
Caches have become increasingly important with the widening gap between main memory and processor speeds. However, they are a source of unpredictability due to their characteristi...
Xavier Vera, Björn Lisper, Jingling Xue
DATE
2009
IEEE
189views Hardware» more  DATE 2009»
14 years 2 months ago
CUFFS: An instruction count based architectural framework for security of MPSoCs
—Multiprocessor System on Chip (MPSoC) architecture is rapidly gaining momentum for modern embedded devices. The vulnerabilities in software on MPSoCs are often exploited to caus...
Krutartha Patel, Sri Parameswaran, Roshan G. Ragel
CGO
2005
IEEE
14 years 1 months ago
A General Compiler Framework for Speculative Optimizations Using Data Speculative Code Motion
Data speculative optimization refers to code transformations that allow load and store instructions to be moved across potentially dependent memory operations. Existing research w...
Xiaoru Dai, Antonia Zhai, Wei-Chung Hsu, Pen-Chung...
CGO
2006
IEEE
14 years 1 months ago
Selecting Software Phase Markers with Code Structure Analysis
Most programs are repetitive, where similar behavior can be seen at different execution times. Algorithms have been proposed that automatically group similar portions of a program...
Jeremy Lau, Erez Perelman, Brad Calder
VEE
2006
ACM
178views Virtualization» more  VEE 2006»
14 years 1 months ago
Impact of virtual execution environments on processor energy consumption and hardware adaptation
During recent years, microprocessor energy consumption has been surging and efforts to reduce power and energy have received a lot of attention. At the same time, virtual executio...
Shiwen Hu, Lizy Kurian John