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» Factoring large numbers with programmable hardware
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HPCA
2003
IEEE
16 years 4 months ago
Mini-Threads: Increasing TLP on Small-Scale SMT Processors
Several manufacturers have recently announced the first simultaneous-multithreaded processors, both as single CPUs and as components of multi-CPU chips. All are small scale, compr...
Joshua Redstone, Susan J. Eggers, Henry M. Levy
FC
1997
Springer
86views Cryptology» more  FC 1997»
15 years 8 months ago
The SPEED Cipher
Abstract. SPEED is a private key block cipher. It supports three variable parameters: (1) data length — the length of a plaintext/ciphertext of SPEED can be 64, 128 or 256 bits. ...
Yuliang Zheng
IPPS
2010
IEEE
15 years 1 months ago
Scalable multi-pipeline architecture for high performance multi-pattern string matching
Multi-pattern string matching remains a major performance bottleneck in network intrusion detection and anti-virus systems for high-speed deep packet inspection (DPI). Although Aho...
Weirong Jiang, Yi-Hua Edward Yang, Viktor K. Prasa...
138
Voted
ISCA
1998
IEEE
129views Hardware» more  ISCA 1998»
15 years 8 months ago
Memory System Characterization of Commercial Workloads
Commercial applications such as databases and Web servers constitute the largest and fastest-growing segment of the market for multiprocessor servers. Ongoing innovations in disk ...
Luiz André Barroso, Kourosh Gharachorloo, E...
SIGMETRICS
2002
ACM
105views Hardware» more  SIGMETRICS 2002»
15 years 3 months ago
Modeling and analysis of dynamic coscheduling in parallel and distributed environments
Scheduling in large-scale parallel systems has been and continues to be an important and challenging research problem. Several key factors, including the increasing use of off-the...
Mark S. Squillante, Yanyong Zhang, Anand Sivasubra...