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ISCA
1992
IEEE
123views Hardware» more  ISCA 1992»
13 years 12 months ago
The Impact of Communication Locality on Large-Scale Multiprocessor Performance
As multiprocessor sizes scale and computer architects turn to interconnection networks with non-uniform communication latencies, the lure of exploiting communication locality to i...
Kirk L. Johnson
ARC
2010
Springer
188views Hardware» more  ARC 2010»
14 years 2 months ago
A Fused Hybrid Floating-Point and Fixed-Point Dot-Product for FPGAs
Dot-products are one of the essential and recurrent building blocks in scientific computing, and often take-up a large proportion of the scientific acceleration circuitry. The ac...
Antonio Roldao Lopes, George A. Constantinides
VTS
1999
IEEE
83views Hardware» more  VTS 1999»
14 years 1 days ago
PADded Cache: A New Fault-Tolerance Technique for Cache Memories
This paper presents a new fault-tolerance technique for cache memories. Current fault-tolerance techniques for caches are limited either by the number of faults that can be tolera...
Philip P. Shirvani, Edward J. McCluskey
ERSA
2008
145views Hardware» more  ERSA 2008»
13 years 9 months ago
Multicore Devices: A New Generation of Reconfigurable Architectures
For two decades, reconfigurable computing systems have provided an attractive alternative to fixed hardware solutions. Reconfigurable computing systems have demonstrated the low c...
Steven A. Guccione
DATE
2007
IEEE
134views Hardware» more  DATE 2007»
14 years 2 months ago
Non-fractional parallelism in LDPC decoder implementations
Because of its excellent bit-error-rate performance, the Low-Density Parity-Check (LDPC) decoding algorithm is gaining increased attention in communication standards and literatur...
John Dielissen, Andries Hekstra