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ISVLSI
2008
IEEE
173views VLSI» more  ISVLSI 2008»
14 years 3 months ago
Hermes-GLP: A GALS Network on Chip Router with Power Control Techniques
The evolution of deep submicron technologies allows the development of increasingly complex Systems on a Chip (SoC). However, this evolution is rendering less viable some well-est...
Julian J. H. Pontes, Matheus T. Moreira, Rafael So...
ESOP
2007
Springer
14 years 2 months ago
A Complete Guide to the Future
Abstract We present the semantics and proof system for an objectoriented language with active objects, asynchronous method calls, and futures. The language, based on Creol, disting...
Frank S. de Boer, Dave Clarke, Einar Broch Johnsen
ARC
2010
Springer
183views Hardware» more  ARC 2010»
13 years 9 months ago
Integrated Design Environment for Reconfigurable HPC
Using FPGAs to accelerate High Performance Computing (HPC) applications is attractive, but has a huge associated cost: the time spent, not for developing efficient FPGA code but fo...
Lilian Janin, Shoujie Li, Doug Edwards
OPODIS
2007
13 years 10 months ago
From an Intermittent Rotating Star to a Leader
Considering an asynchronous system made up of n processes and where up to t of them can crash, finding the weakest assumptions that such a system has to satisfy for a common leade...
Antonio Fernández Anta, Michel Raynal
ISORC
2005
IEEE
14 years 2 months ago
Building Responsive TMR-Based Servers in Presence of Timing Constraints
This paper is on the construction of a fault-tolerant and responsive server subsystem in an application context where the subsystem is accessed through an asynchronous network by ...
Paul D. Ezhilchelvan, Jean-Michel Hélary, M...