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» False-noise analysis using logic implications
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DAC
2001
ACM
14 years 11 months ago
Analysis of On-Chip Inductance Effects using a Novel Performance Optimization Methodology for Distributed RLC Interconnects
This work presents a new and computationally efficient performance optimization technique for distributed RLC interconnects based on a rigorous delay computation scheme. The new o...
Kaustav Banerjee, Amit Mehrotra
ATAL
2006
Springer
14 years 2 months ago
On the complexity of practical ATL model checking
We investigate the computational complexity of reasoning about multi-agent systems using the cooperation logic ATL of Alur, Henzinger, and Kupferman. It is known that satisfiabili...
Wiebe van der Hoek, Alessio Lomuscio, Michael Wool...
IPM
2000
69views more  IPM 2000»
13 years 10 months ago
Real life, real users, and real needs: a study and analysis of user queries on the web
We analyzed transaction logs containing 51,473 queries posed by 18,113 users of Excite, a major Internet search service. We provide data on: (i) sessions - changes in queries durin...
Bernard J. Jansen, Amanda Spink, Tefko Saracevic
CSL
2007
Springer
14 years 5 months ago
The Power of Counting Logics on Restricted Classes of Finite Structures
Abstract. Although Cai, F¨urer and Immerman have shown that fixedpoint logic with counting (IFP + C) does not express all polynomialtime properties of finite structures, there h...
Anuj Dawar, David Richerby
ITC
1998
IEEE
174views Hardware» more  ITC 1998»
14 years 3 months ago
High volume microprocessor test escapes, an analysis of defects our tests are missing
This paper explores defects found in a high volume microprocessor when shipping at a low defect level. A brief description of the manufacturing flow along with definition of DPM i...
Wayne M. Needham, Cheryl Prunty, Yeoh Eng Hong