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CODES
2009
IEEE
14 years 2 months ago
Using binary translation in event driven simulation for fast and flexible MPSoC simulation
In this paper, we investigate the use of instruction set simulators (ISS) based on binary translation to accelerate full timed multiprocessor system simulation at transaction leve...
Marius Gligor, Nicolas Fournel, Frédé...
ASPDAC
2007
ACM
156views Hardware» more  ASPDAC 2007»
13 years 11 months ago
PLLSim - An Ultra Fast Bang-Bang Phase Locked Loop Simulation Tool
- This paper presents a simulation tool targeted specifically at bang-bang type phase locked loop systems. The aim of this simulator is to quickly and accurately predict important ...
Michael Chan, Adam Postula, Yong Ding
MASCOTS
1997
13 years 8 months ago
A Hybrid Simulation Approach Enabling Performance Characterization of Large Software Systems
We describe a method for performance analysis of large software systems that combines a fast instruction-set simulator with off-line detailed analysis of segments of the execution...
Bengt Werner, Peter S. Magnusson
TC
2008
13 years 7 months ago
Accurate, Pre-RTL Temperature-Aware Design Using a Parameterized, Geometric Thermal Model
Abstract-- Preventing silicon chips from negative, even disastrous thermal hazards has become increasingly challenging these days; considering thermal effects early in the design c...
Wei Huang, Karthik Sankaranarayanan, Kevin Skadron...
ICCD
2007
IEEE
139views Hardware» more  ICCD 2007»
14 years 4 months ago
Statistical simulation of chip multiprocessors running multi-program workloads
This paper explores statistical simulation as a fast simulation technique for driving chip multiprocessor (CMP) design space exploration. The idea of statistical simulation is to ...
Davy Genbrugge, Lieven Eeckhout