159 search results - page 10 / 32 » Fast Design Space Exploration Method for Reconfigurable Arch... |
CODES
2006
IEEE
14 years 1 months ago
2006
IEEE
Transaction-level modeling has been touted to improve simulation performance and modeling efficiency for early design space exploration. But no tools are available to generate suc...
VLSISP
2008
13 years 7 months ago
2008
ion of Abstract Performance Models for System-Level Design Space Exploration ANDY D. PIMENTEL, MARK THOMPSON, SIMON POLSTRA AND CAGKAN ERBAS Computer Systems Architecture Group, In...
FPL
2000
Springer
13 years 11 months ago
2000
Springer
Coarse-grain reconfigurable architectures have been a matter of intense research in the last few years. They promise to be more adequate for computational tasks due to their better...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
- In this paper, we present a design methodology for automatic platform generation of future heterogeneous systems where communication happens via the Network-onChip (NoC) approach...
ISCAS
2005
IEEE
14 years 1 months ago
2005
IEEE
— In this paper, we propose an interconnect-driven framework that performs an efficient and effective design space exploration for deep submicron processor architecture design. ...