85 search results - page 3 / 17 » Fast Out-Of-Order Processor Simulation Using Memoization |
ISPASS
2005
IEEE
14 years 1 months ago
2005
IEEE
Simulation-based microarchitecture research is often hindered by the slow speed of simulators. In this work, we propose a novel statistical technique to identify highly representa...
DAC
2003
ACM
14 years 21 days ago
2003
ACM
Instruction set simulators are critical tools for the exploration and validation of new programmable architectures. Due to increasing complexity of the architectures and timeto-ma...
BIRTHDAY
1994
Springer
13 years 11 months ago
1994
Springer
Cook's construction from 1971 [4] shows that any two-way deterministic pushdown automaton (2DPDA) can be simulated in time O(n), where n is the length of its input string, and...
APPT
2009
Springer
14 years 2 months ago
2009
Springer
Abstract. With more cores integrated into one single chip, the overall power consumption from the multiple concurrent running programs increases dramatically in a CMP processor whi...
ASYNC
1998
IEEE
13 years 11 months ago
1998
IEEE
This paper presents the architecture and design of a high-performance asynchronous Huffman decoder for compressed-code embedded processors. In such processors, embedded programs a...