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ICVGIP
2008
13 years 9 months ago
Fast, Processor-Cardinality Agnostic PRNG with a Tracking Application
As vision algorithms mature with increasing inspiration from the learning community, statistically independent pseudo random number generation (PRNG) becomes increasingly importan...
Andrew Janowczyk, Sharat Chandran, Srinivas Aluru
FPL
2009
Springer
135views Hardware» more  FPL 2009»
14 years 2 days ago
Fast critical sections via thread scheduling for FPGA-based multithreaded processors
As FPGA-based systems including soft processors become increasingly common, we are motivated to better understand the architectural trade-offs and improve the efficiency of these...
Martin Labrecque, J. Gregory Steffan
CAL
2006
13 years 7 months ago
Performance modeling using Monte Carlo simulation
Abstract-- Cycle accurate simulation has long been the primary tool for micro-architecture design and evaluation. Though accurate, the slow speed often imposes constraints on the e...
Ram Srinivasan, Jeanine Cook, Olaf M. Lubeck
ICCAD
2001
IEEE
185views Hardware» more  ICCAD 2001»
14 years 4 months ago
Application-Driven Processor Design Exploration for Power-Performance Trade-off Analysis
1 - This paper presents an efficient design exploration environment for high-end core processors. The heart of the proposed design exploration framework is a two-level simulation e...
Diana Marculescu, Anoop Iyer
CODES
2007
IEEE
14 years 1 months ago
HySim: a fast simulation framework for embedded software development
Instruction Set Simulation (ISS) is widely used in system evaluation and software development for embedded processors. Despite the significant advancements in the ISS technology,...
Stefan Kraemer, Lei Gao, Jan Weinstock, Rainer Leu...