239 search results - page 34 / 48 » Fast Prefix Code Processing |
CODES
2007
IEEE
14 years 1 months ago
2007
IEEE
With growing capacities of flash memories, an efficient layer to manage read and write access to flash is required. NFTL is a widely used block based flash translation layer de...
CODES
2004
IEEE
13 years 11 months ago
2004
IEEE
This paper proposes a novel Deadlock Avoidance Algorithm (DAA) and its hardware implementation, the Deadlock Avoidance Unit (DAU), as an Intellectual Property (IP) core that provi...
SIES
2007
IEEE
14 years 1 months ago
2007
IEEE
— High level synthesis is one of the next major steps to improve the hw/sw co-design process. The advantages of high nthesis are two-fold. At first the level of abstraction is r...
VTC
2006
IEEE
14 years 1 months ago
2006
IEEE
— The optimal codeword length that generates the maximum output signal to interference ratio (SIR) for the channel-phase-precoded ultra-wideband (CPPUWB) system proposed in [1] i...
IAJIT
2010
13 years 6 months ago
2010
: A new code sign implementation of vector median rational hybrid filter based on efficient hardware/software implementation is introduced and applied to colour image filtering pro...