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» Fast Simulation Techniques for Design Space Exploration
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ISSS
1996
IEEE
143views Hardware» more  ISSS 1996»
13 years 11 months ago
DSP Processor/Compiler Co-Design: A Quantitative Approach
In the paper the problem of processor/compiler codesign for digital signal processing and embedded SYstems is discussed. The main principle we follow is the top-down approach char...
Vojin Zivojnovic, Stefan Pees, C. Schälger, M...
DAC
2007
ACM
14 years 8 months ago
Parameterized Macromodeling for Analog System-Level Design Exploration
In this paper we propose a novel parameterized macromodeling technique for analog circuits. Unlike traditional macromodels that are only extracted for a small variation space, our...
Jian Wang, Xin Li, Lawrence T. Pileggi
ERSA
2003
139views Hardware» more  ERSA 2003»
13 years 8 months ago
Fast Design Space Exploration Method for Reconfigurable Architectures
In this paper we propose an original and fast design space exploration method targeting reconfigurable architectures. This method takes place during the first steps of a design fl...
Lilian Bossuet, Guy Gogniat, Jean Luc Philippe
ARCS
2012
Springer
12 years 3 months ago
Fast Scenario-Based Design Space Exploration using Feature Selection
: This paper presents a novel approach to efficiently perform early system level design space exploration (DSE) of MultiProcessor System-on-Chip (MPSoC) based embedded systems. By...
Peter van Stralen, Andy D. Pimentel
DATE
2009
IEEE
178views Hardware» more  DATE 2009»
14 years 2 months ago
ORION 2.0: A fast and accurate NoC power and area model for early-stage design space exploration
As industry moves towards many-core chips, networks-on-chip (NoCs) are emerging as the scalable fabric for interconnecting the cores. With power now the first-order design constr...
Andrew B. Kahng, Bin Li, Li-Shiuan Peh, Kambiz Sam...