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ISPD
2005
ACM
116views Hardware» more  ISPD 2005»
14 years 2 months ago
A fast algorithm for power grid design
This paper presents an efficient heuristic algorithm to design a power distribution network of a chip by employing a successive partitioning and grid refinement scheme. In an it...
Jaskirat Singh, Sachin S. Sapatnekar
TVLSI
2010
13 years 3 months ago
Discrete Buffer and Wire Sizing for Link-Based Non-Tree Clock Networks
Clock network is a vulnerable victim of variations as well as a main power consumer in many integrated circuits. Recently, link-based non-tree clock network attracts people's...
Rupak Samanta, Jiang Hu, Peng Li
EWSN
2008
Springer
14 years 8 months ago
Que: A Sensor Network Rapid Prototyping Tool with Application Experiences from a Data Center Deployment
Several considerable impediments stand in the way of sensor network prototype applications that wish to realize sustained deployments. These are: scale, longevity, data of interest...
David Chu, Feng Zhao, Jie Liu, Michel Goraczko
EUROMICRO
2006
IEEE
14 years 2 months ago
Towards Ethernet-Based Wireless Mesh Networks for Fast Moving Users
In this paper we examine the capabilities of Switched Ethernet for building wireless mesh networks (WMNs) and more specific for the support of fast moving users. We will motivate...
Filip De Greve, Wim Vandenberghe, Filip De Turck, ...
ICS
2009
Tsinghua U.
14 years 1 months ago
Exploring pattern-aware routing in generalized fat tree networks
New static source routing algorithms for High Performance Computing (HPC) are presented in this work. The target parallel architectures are based on the commonly used fattree netw...
Germán Rodríguez, Ramón Beivi...