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ICCAD
1991
IEEE
135views Hardware» more  ICCAD 1991»
13 years 11 months ago
DIATEST: A Fast Diagnostic Test Pattern Generator for Combinational Circuits
This paper presents an efficient algorithm for the generation of diagnostic test patterns which distinguish between two arbitrary single stuck-at faults. The algorithm is able to ...
Torsten Grüning, Udo Mahlstedt, Hartmut Koopm...
DATE
2005
IEEE
164views Hardware» more  DATE 2005»
13 years 9 months ago
Fast and Accurate Transaction Level Modeling of an Extended AMBA2.0 Bus Architecture
Transaction Level Modeling (TLM) approach is used to meet the simulation speed as well as cycle accuracy for large scale SoC performance analysis. We implemented a transaction-lev...
Young-Taek Kim, Taehun Kim, Youngduk Kim, Chulho S...
APCCAS
2006
IEEE
261views Hardware» more  APCCAS 2006»
13 years 9 months ago
A Grouped Fast Fourier Transform Algorithm Design For Selective Transformed Outputs
- In this paper, the grouped scheme is specially applied to compute the fast Fourier transform (FFT) when the portions of transformed outputs are calculated selectively. The groupe...
Chih-Peng Fan, Guo-An Su
FPL
2009
Springer
135views Hardware» more  FPL 2009»
14 years 10 days ago
Fast critical sections via thread scheduling for FPGA-based multithreaded processors
As FPGA-based systems including soft processors become increasingly common, we are motivated to better understand the architectural trade-offs and improve the efficiency of these...
Martin Labrecque, J. Gregory Steffan
ICDE
2011
IEEE
235views Database» more  ICDE 2011»
12 years 11 months ago
Fast data analytics with FPGAs
—The rapidly increasing amount of data available for real-time analysis (i.e., so-called operational business intelligence) is creating an interesting opportunity for creative ap...
Louis Woods, Gustavo Alonso