Sciweavers

522 search results - page 79 / 105
» Fast Smith-Waterman hardware implementation
Sort
View
CF
2006
ACM
14 years 1 months ago
A nano-scale reconfigurable mesh with spin waves
In this paper, we present a nano-scale reconfigurable mesh that is interconnected with ferromagnetic spin-wave buses. The architecture described here, while requiring the same num...
Mary Mehrnoosh Eshaghian-Wilner, Alexander Khitun,...
ISCAS
2005
IEEE
129views Hardware» more  ISCAS 2005»
14 years 1 months ago
A reconfigurable architecture for scanning biosequence databases
—Unknown protein sequences are often compared to a set of known sequences (a database scan) to detect functional similarities. Even though efficient dynamic programming algorithm...
Timothy F. Oliver, Bertil Schmidt, Douglas L. Mask...
MICRO
2005
IEEE
108views Hardware» more  MICRO 2005»
14 years 1 months ago
How to Fake 1000 Registers
Large numbers of logical registers can improve performance by allowing fast access to multiple subroutine contexts (register windows) and multiple thread contexts (multithreading)...
David W. Oehmke, Nathan L. Binkert, Trevor N. Mudg...
DATE
2003
IEEE
112views Hardware» more  DATE 2003»
14 years 1 months ago
Automatic Generation of Simulation Monitors from Quantitative Constraint Formula
System design methodology is poised to become the next big enabler for highly sophisticated electronic products. Design verification continues to be a major challenge and simulat...
Xi Chen, Harry Hsieh, Felice Balarin, Yosinori Wat...
ISLPED
2000
ACM
70views Hardware» more  ISLPED 2000»
14 years 2 days ago
An adaptive on-chip voltage regulation technique for low-power applications
In this paper we present a completely on-chip voltage regulation technique which promises to adjust the degree of voltage regulation in a digital logic chip in the face of process...
Nicola Dragone, Akshay Aggarwal, L. Richard Carley