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130
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MICRO
2008
IEEE
107views Hardware» more  MICRO 2008»
15 years 10 months ago
A distributed processor state management architecture for large-window processors
— Processor architectures with large instruction windows have been proposed to expose more instruction-level parallelism (ILP) and increase performance. Some of the proposed arch...
Isidro Gonzalez, Marco Galluzzi, Alexander V. Veid...
166
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WSC
2004
15 years 5 months ago
A Unified Approach for Finite-Dimensional, Rare-Event Monte Carlo Simulation
We consider the problem of estimating the small probability that a function of a finite number of random variables exceeds a large threshold. Each input random variable may be lig...
Zhi Huang, Perwez Shahabuddin
133
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CSREAESA
2006
15 years 5 months ago
Delay-Reduced Combinational Logic Synthesis using Multiplexers
- This paper presents an approach to obtain reduced hardware and/or delay for synthesizing logic functions using multiplexers. Replication of single control line multiplexer is use...
Rekha K. James, T. K. Shahana, K. Poulose Jacob, S...
144
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ICIC
2009
Springer
15 years 10 months ago
Function Sequence Genetic Programming
Genetic Programming(GP) can obtain a program structure to solve complex problem. This paper presents a new form of Genetic Programming, Function Sequence Genetic Programming (FSGP)...
Shixian Wang, Yuehui Chen, Peng Wu
152
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JAIR
2006
179views more  JAIR 2006»
15 years 3 months ago
The Fast Downward Planning System
Fast Downward is a classical planning system based on heuristic search. It can deal with general deterministic planning problems encoded in the propositional fragment of PDDL2.2, ...
Malte Helmert