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» Fast three-level logic minimization based on autosymmetry
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ISLPED
2000
ACM
70views Hardware» more  ISLPED 2000»
13 years 11 months ago
An adaptive on-chip voltage regulation technique for low-power applications
In this paper we present a completely on-chip voltage regulation technique which promises to adjust the degree of voltage regulation in a digital logic chip in the face of process...
Nicola Dragone, Akshay Aggarwal, L. Richard Carley
HPCA
2007
IEEE
14 years 7 months ago
HARD: Hardware-Assisted Lockset-based Race Detection
The emergence of multicore architectures will lead to an increase in the use of multithreaded applications that are prone to synchronization bugs, such as data races. Software sol...
Pin Zhou, Radu Teodorescu, Yuanyuan Zhou
AIPS
2009
13 years 8 months ago
Flexible Execution of Plans with Choice
Dynamic plan execution strategies allow an autonomous agent to respond to uncertainties while improving robustness and reducing the need for an overly conservative plan. Executive...
Patrick R. Conrad, Julie A. Shah, Brian C. William...