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DATE
2006
IEEE
145views Hardware» more  DATE 2006»
14 years 4 months ago
Building a better Boolean matcher and symmetry detector
Boolean matching is a powerful technique that has been used in technology mapping to overcome the limitations of structural pattern matching. The current basis for performing Bool...
Donald Chai, Andreas Kuehlmann
DATE
2006
IEEE
110views Hardware» more  DATE 2006»
14 years 4 months ago
An improved RF loopback for test time reduction
In this work a method to improve the loopback test used in RF analog circuits is described. The approach is targeted to the SoC environment, being able to reuse system resources i...
Marcelo Negreiros, Luigi Carro, Altamiro Amadeu Su...
DSRT
2006
IEEE
14 years 4 months ago
Speedup-Precision Tradeoffs in Time-Parallel Simulation of Wireless Ad hoc Networks
In this paper, we report on a series of experiments involving the speedups obtainable with time-parallel simulation of wireless ad hoc networks. A mobile ad hoc network scenario i...
Damla Turgut, Guoqiang Wang, Ladislau Böl&oum...
FCCM
2006
IEEE
106views VLSI» more  FCCM 2006»
14 years 4 months ago
Scalable Hardware Architecture for Real-Time Dynamic Programming Applications
Abstract— This paper introduces a novel architecture for performing the core computations required by dynamic programming (DP) techniques. The latter pertain to a vast range of a...
Brad Matthews, Itamar Elhanany
IAT
2006
IEEE
14 years 4 months ago
A Multi-stage Graph Decomposition Algorithm for Distributed Constraint Optimisation
In this paper, we propose a novel approach to solving the distributed constraint optimisation problem (DCOP) that guarantees completeness, while having linear communication comple...
Terence H.-W. Law, Adrian R. Pearce