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ESA
2001
Springer
61views Algorithms» more  ESA 2001»
14 years 2 months ago
A Separation Bound for Real Algebraic Expressions
Real algebraic expressions are expressions whose leaves are integers and whose internal nodes are additions, subtractions, multiplications, divisions, k-th root operations for int...
Christoph Burnikel, Stefan Funke, Kurt Mehlhorn, S...
MICRO
1996
IEEE
129views Hardware» more  MICRO 1996»
14 years 2 months ago
Trace Cache: A Low Latency Approach to High Bandwidth Instruction Fetching
As the issue widthof superscalar processors is increased, instructionfetch bandwidthrequirements will also increase. It will become necessary to fetch multiple basic blocks per cy...
Eric Rotenberg, Steve Bennett, James E. Smith
ICCAD
1994
IEEE
104views Hardware» more  ICCAD 1994»
14 years 2 months ago
Module selection and data format conversion for cost-optimal DSP synthesis
In high level synthesis each node of a synchronous dataflow graph (DFG) is scheduled to a specific time and allocated to a processor. In this paper we present new integer linear p...
Kazuhito Ito, Lori E. Lucke, Keshab K. Parhi
ANTS
1994
Springer
105views Algorithms» more  ANTS 1994»
14 years 2 months ago
A fast variant of the Gaussian reduction algorithm
We propose a fast variant of the Gaussian algorithm for the reduction of two{ dimensional lattices for the l1; l2; and l1;norm. The algorithm runs in at most O(n M(B) logB) bit op...
Michael Kaib
FPGA
1995
ACM
120views FPGA» more  FPGA 1995»
14 years 1 months ago
Synthesis of Signal Processing Structured Datapaths for FPGAs Supporting RAMs and Busses
A novel approach is presented for transforming a given scheduled and bound signal processing algorithm for a multiplexer based datapath to a BUS/RAM based FPGA datapath. A datapat...
Baher Haroun, Behzad Sajjadi