29 search results - page 5 / 6 » Faster minimization of linear wirelength for global placemen... |
DAC
2007
ACM
14 years 8 months ago
2007
ACM
In this paper, we present a new multi-packing tree (MP-tree) representation for macro placement to handle mixed-size designs. Based on binary trees, the MP-tree is very efficient,...
TCAD
2011
13 years 2 months ago
2011
Abstract—This work introduces GRIP, a global routing technique via integer programming. GRIP optimizes wirelength and via cost directly without going through a traditional layer ...
ISPD
2010
ACM
14 years 2 months ago
2010
ACM
Obstacle-avoiding rectilinear Steiner minimal tree (OARSMT) construction is becoming one of the most sought after problems in modern design flow. In this paper we present FOARS, ...
DAC
2007
ACM
14 years 8 months ago
2007
ACM
The flip-chip package provides a high chip-density solution to the demand for more I/O pads of VLSI designs. In this paper, we present the first routing algorithm in the literatur...
ICCAD
2006
IEEE
14 years 4 months ago
2006
IEEE
We present a novel incremental placement methodology called FlowPlace for significantly reducing critical path delays of placed standard-cell circuits. FlowPlace includes: a) a t...