Sciweavers

281 search results - page 41 / 57
» Fastpath Speculative Parallelization
Sort
View
CF
2006
ACM
14 years 3 months ago
Kilo-instruction processors, runahead and prefetching
There is a continuous research effort devoted to overcome the memory wall problem. Prefetching is one of the most frequently used techniques. A prefetch mechanism anticipates the ...
Tanausú Ramírez, Alex Pajuelo, Olive...
ICFP
2008
ACM
14 years 9 months ago
A scheduling framework for general-purpose parallel languages
The trend in microprocessor design toward multicore and manycore processors means that future performance gains in software will largely come from harnessing parallelism. To reali...
Matthew Fluet, Mike Rainey, John H. Reppy
MICRO
2007
IEEE
108views Hardware» more  MICRO 2007»
14 years 4 months ago
FPGA-Accelerated Simulation Technologies (FAST): Fast, Full-System, Cycle-Accurate Simulators
This paper describes FAST, a novel simulation methodology that can produce simulators that (i) are orders of magnitude faster than comparable simulators, (ii) are cycleaccurate, (...
Derek Chiou, Dam Sunwoo, Joonsoo Kim, Nikhil A. Pa...
ICFP
2007
ACM
14 years 9 months ago
Feedback directed implicit parallelism
In this paper we present an automated way of using spare CPU resources within a shared memory multi-processor or multi-core machine. Our approach is (i) to profile the execution o...
Tim Harris, Satnam Singh
MICRO
1999
IEEE
110views Hardware» more  MICRO 1999»
14 years 2 months ago
Balance Scheduling: Weighting Branch Tradeoffs in Superblocks
Since there is generally insufficient instruction level parallelism within a single basic block, higher performance is achieved by speculatively scheduling operations in superbloc...
Alexandre E. Eichenberger, Waleed Meleis