47 search results - page 5 / 10 » Fault Tolerance for Multistage Interconnection Networks |
ISPAN
2002
IEEE
14 years 23 days ago
2002
IEEE
The concept of safety vector can guide efficient fault-tolerant routing on interconnection networks. The safety vector on the hypercube is based on the distance of a pair of nodes...
HPDC
2009
IEEE
14 years 2 months ago
2009
IEEE
Long running High Performance Computing (HPC) applications at scale must be able to tolerate inevitable faults if they are to harness current and future HPC systems. Message Passi...
ICN
2005
Springer
14 years 1 months ago
2005
Springer
It is shown that the de Bruijn graph (dBG) can be used as an architecture for interconnection networks and a suitable structure for parallel computation. Recent works have classi...
IWCMC
2009
ACM
14 years 2 months ago
2009
ACM
Minimal configuration and quick deployment of ad hoc networks make it suitable for numerous applications such as emergency situations, border monitoring, and military missions, e...
ICCAD
2008
IEEE
14 years 4 months ago
2008
IEEE
— Three-dimensional die stacking integration provides the ability to stack multiple layers of processed silicon with a large number of vertical interconnects. Through Silicon Via...