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MICRO
2008
IEEE
159views Hardware» more  MICRO 2008»
14 years 1 months ago
A novel cache architecture with enhanced performance and security
—Caches ideally should have low miss rates and short access times, and should be power efficient at the same time. Such design goals are often contradictory in practice. Recent f...
Zhenghong Wang, Ruby B. Lee
CODES
2007
IEEE
14 years 1 months ago
Reliable multiprocessor system-on-chip synthesis
This article presents a multiprocessor system-on-chip synthesis (MPSoC) algorithm that optimizes system mean time to failure. Given a set of directed acyclic periodic graphs of co...
Changyun Zhu, Zhenyu (Peter) Gu, Robert P. Dick, L...
IROS
2007
IEEE
198views Robotics» more  IROS 2007»
14 years 1 months ago
Cooperation of heterogeneous, autonomous robots: A case study of humanoid and wheeled robots
Abstract— In this paper we present a case study of cooperation of a strongly heterogeneous robot team, composed of a highly articulated humanoid robot and a wheeled robot with la...
Jutta Kiener, Oskar von Stryk
NGC
2000
Springer
13 years 11 months ago
The use of hop-limits to provide survivable ATM group communications
We examine the use of a hop-limit constraint with techniques to provide survivability for connection-oriented ATM group communications. A hop-limit constraint is an approach that ...
William Yurcik, David Tipper, Deep Medhi
ATAL
2008
Springer
13 years 9 months ago
WADE: a software platform to develop mission critical applications exploiting agents and workflows
In this paper, we describe two mission critical applications currently deployed by Telecom Italia in the Operations Support System domains. The first one called "Network Neut...
Giovanni Caire, Danilo Gotta, Massimo Banzi