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» Fault simulation on reconfigurable hardware
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VTS
2000
IEEE
100views Hardware» more  VTS 2000»
14 years 9 days ago
Functional Memory Faults: A Formal Notation and a Taxonomy
Abstract: This paper presents a notation for describing functional fault models, which may occur in memory devices. Using this notation, the space of all possible memory faults has...
A. J. van de Goor, Zaid Al-Ars
ITC
1994
IEEE
111views Hardware» more  ITC 1994»
14 years 1 days ago
Simulation Results of an Efficient Defect-Analysis Procedure
For obtaining a zero defect level, a high fault coverage with respect to the stuck-at fault model is often not sufficient as there are many defects that show a more complex behavi...
Olaf Stern, Hans-Joachim Wunderlich
ICPPW
2008
IEEE
14 years 2 months ago
Simulating Failures on Large-Scale Systems
—Developing fault management mechanisms is a difficult task because of the unpredictable nature of failures. In this paper, we present a fault simulation framework for Blue Gene...
Narayan Desai, Ewing L. Lusk, Daniel Buettner, And...
DSD
2005
IEEE
106views Hardware» more  DSD 2005»
14 years 1 months ago
SystemC-based Design Methodology for Reconfigurable System-on-Chip
Reconfigurable system is a promising alternative to deliver both flexibility and performance at the same time. New reconfigurable technologies and technologydependent tools have b...
Yang Qu, Kari Tiensyrjä, Juha-Pekka Soininen
ERSA
2009
146views Hardware» more  ERSA 2009»
13 years 5 months ago
Programming Model and Low-level Language for a Coarse-Grained Reconfigurable Multimedia Processor
We present the architecture and programming model for MORA, a coarse-grained reconfigurable processor aimed at multimedia applications. The MORA architecure is a MIMD machine consi...
Wim Vanderbauwhede, Martin Margala, Sai Rahul Chal...