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» Fault simulation on reconfigurable hardware
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DATE
2000
IEEE
136views Hardware» more  DATE 2000»
14 years 1 months ago
Parametric Fault Simulation and Test Vector Generation
Process variation has forever been the major fail cause of analog circuit where small deviations in component values cause large deviations in the measured output parameters. This...
Khaled Saab, Naim Ben Hamida, Bozena Kaminska
EH
2003
IEEE
136views Hardware» more  EH 2003»
14 years 2 months ago
Experimental Results in Evolutionary Fault-Recovery for Field Programmable
This paper presents experimental results of fast intrinsic evolutionary design and evolutionary fault recovery of a 4-bit Digital to Analog Converter (DAC) using the JPL stand-alo...
Ricardo Salem Zebulum, Didier Keymeulen, Vu Duong,...
ICANNGA
2011
Springer
254views Algorithms» more  ICANNGA 2011»
12 years 8 months ago
Simulated Evolution (SimE) Based Embedded System Synthesis Algorithm for Electric Circuit Units (ECUs)
ECU (Electric Circuit Unit) is a type of embedded system that is used in automobiles to perform different functions. The synthesis process of ECU requires that the hardware should...
Umair F. Siddiqi, Yoichi Shiraishi, Mona Abo El Da...
PRDC
2008
IEEE
14 years 3 months ago
Conjoined Pipeline: Enhancing Hardware Reliability and Performance through Organized Pipeline Redundancy
Reliability has become a serious concern as systems embrace nanometer technologies. In this paper, we propose a novel approach for organizing redundancy that provides high degree ...
Viswanathan Subramanian, Arun K. Somani
DSD
2010
IEEE
221views Hardware» more  DSD 2010»
13 years 7 months ago
Modeling Reconfigurable Systems-on-Chips with UML MARTE Profile: An Exploratory Analysis
Reconfigurable FPGA based Systems-on-Chip (SoC) architectures are increasingly becoming the preferred solution for implementing modern embedded systems, due to their flexible natur...
Sana Cherif, Imran Rafiq Quadri, Samy Meftali, Jea...