372 search results - page 51 / 75 » Fault simulation on reconfigurable hardware |
ISCA
1999
IEEE
14 years 1 months ago
1999
IEEE
Information integrity in cache memories is a fundamental requirement for dependable computing. Conventional architectures for enhancing cache reliability using check codes make it...
DATE
2002
IEEE
14 years 2 months ago
2002
IEEE
This paper describes the AccuPower toolset -- a set of simulation tools accurately estimating the power dissipation within a superscalar microprocessor. AccuPower uses a true hard...
EDCC
1999
Springer
14 years 1 months ago
1999
Springer
In this paper we present a new fault tolerant clock synchronization algorithm called the Fault Tolerant Daisy Chain algorithm. It is intended for internal clock synchronization of...
HPCA
1996
IEEE
14 years 1 months ago
1996
IEEE
The current multiprocessors such asCray T3D support interprocessor communication using partitioned dimension-order routers (PDRs). In a PDR implementation, the routing logic and sw...
SC
2004
ACM
14 years 2 months ago
2004
ACM
Today, clusters built from commodity PCs dominate high-performance computing, with systems containing thousands of processors now being deployed. As node counts for multi-teraflo...