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» Fault simulation on reconfigurable hardware
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ASPLOS
2000
ACM
14 years 1 months ago
Slipstream Processors: Improving both Performance and Fault Tolerance
Processors execute the full dynamic instruction stream to arrive at the final output of a program, yet there exist shorter instruction streams that produce the same overall effec...
Karthik Sundaramoorthy, Zachary Purser, Eric Roten...
JUCS
2006
95views more  JUCS 2006»
13 years 9 months ago
Fault Tolerant Neural Predictors for Compression of Sensor Telemetry Data
: When dealing with remote systems, it is desirable that these systems are capable of operation within acceptable levels with minimal control and maintenance. In terms or transmiss...
Rajasvaran Logeswaran
DATE
2008
IEEE
103views Hardware» more  DATE 2008»
14 years 3 months ago
A Mutation Model for the SystemC TLM 2.0 Communication Interfaces
Mutation analysis is a widely-adopted strategy in software testing with two main purposes: measuring the quality of test suites, and identifying redundant code in programs. Simila...
Nicola Bombieri, Franco Fummi, Graziano Pravadelli
DFT
2003
IEEE
142views VLSI» more  DFT 2003»
14 years 2 months ago
Exploiting Instruction Redundancy for Transient Fault Tolerance
This paper presents an approach for integrating fault-tolerance techniques into microprocessors by utilizing instruction redundancy as well as time redundancy. Smaller and smaller...
Toshinori Sato
MA
2000
Springer
99views Communications» more  MA 2000»
14 years 22 days ago
Multiple Agent-Based Autonomy for Satellite Constellations
Multiple, highly autonomous, satellite systems are envisioned in the near future because they are capable of higher performance, lower cost, better fault tolerance, reconfigurabil...
Thomas P. Schetter, Mark E. Campbell, Derek M. Sur...